Testing the Limits of Power

Personal navigation devices, portable vehicle navigation devices, portable telematics units, GPS-enabled cell phones, GPS-equipped PDAs, portable tracking devices . . . mobile devices for positioning, navigation and communications are proliferating at a fantastic rate. Often these are multi-function devices, perhaps combining an MP3 player, digital camera, cellular modem, and a GPS receiver. Although they vary in configuration and functionality, these products all have one thing in common: They rely on batteries to operate. And sooner or later (too often sooner), they inevitably run out of power.

Until the ever-charge battery comes along, we’ll have to maximize the field lives of the batteries we do have. One way to do that is to specify energy-saving components when designing these mobile devices, which requires an understanding of how these components work in real-world environments and situations. For an MP3 player or digital camera, power consumption is fairly predictable. For a GPS receiver, however, it is not.

Users operate GPS receivers in a variety of environments, from open sky to closed car trunks, from underground garages to upper-story offices, from beltways to belts. And when they are challenged to find the GPS satellite signal, they use power — sometimes lots of power. That means shorter battery life and a shorter mission life for a GPS-equipped mobile device. Therefore, specifying the best, most power-efficient GPS receiver for a particular application becomes critical. This article proposes a methodology for evaluating GPS receiver chipsets to ascertain their true power consumption in common use scenarios and thus help design engineers pick the right GPS chipset for the job.

Creating a Test Plan

In making design decisions regarding which particular GPS receiver chipset or module to employ, we can fairly easily assess the candidate products based on the navigation solution accuracy required, form factor, and cost. However, comparisons of power consumption among various GPS receiver products are difficult.

Data sheet values provided by the manufacturers are about all that is available to help designers in the selection process. But do those data tell the whole story? A product designer evaluating his or her choices must be careful in interpreting and comparing the power levels quoted in data sheets: for instance, whether the values are presented for full-up GPS solution or for RF front-end or the GPS engine only. Furthermore, we know that certain GPS receiver functions draw more power than others — for example, continuous search mode in a satellite-obscured environment will zap power rapidly, while open sky sampling will not. So how do we go about assessing power consumption and characterizing the energy use of competing GPS receivers? Why, establish a test methodology and procedure, of course!

This article discusses a methodology created for independently assessing GPS receiver chipsets under a variety of environmental scenarios and under different operating modes. If we can devise test methods that designers can apply across different kinds of receiver chipsets, the methodology can provide insight into relative power consumption among the different devices, helping product engineers specify the optimum GPS receiver for their application.

(For the rest of this story, please download the complete article using the PDF link above.)

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